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CL180LP
CL180LP (0.18um CMOS Low Power), a foundry matched technology from SilTerra is optimized for low leakage, making it an ideal technology platform for battery power applications.
The technology is supported by a set of silicon proven standard design libraries, SRAM compiler and I/O.
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| CL180LP Key Process Features |
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Single poly, up to six metal layers |
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Supports 1.8V and 3.3V power supplies |
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Very low leakage current |
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Shallow trench isolation |
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Dual gate oxide |
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Surface channel NMOS and PMOS |
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Cobalt silicided source, drain and gate |
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Borderless contact and via |
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Aluminum metallization with tungsten plug |
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High density plasma gap fill |
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FSG inter-metal dielectrics |
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Physical Design Rule
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Electrical Design Rule (Specification)
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