Second-tier foundries expansion to heat up competition in advanced processes 

By Claire Sung and Rodney Chan

Digitimes
URL: http://www.digitimes.com/NewsShow/NewsSearch.asp?DocID=PD000000000000000000000000002790&query=SILTERRA
Tuesday, August 27, 2007

Silterra is relatively small in terms of business scale in comparison to well-known big names in the pure-play foundry business. But the Malaysia-based foundry has drawn attention these days from a series of management reshuffles over the past six months.

Eg Kah Yee was appointed as the new chief executive officer (CEO) after spending years in the electronic design automation (EDA) industry. Yit-Loong Lai, the new sales vice president, takes his position at Silterra after performing as Intel China country manager and Nvidia Southeast Asia vice president. Tzu-Yin Chiu, who has worked at Hua Hong NEC (HHNEC), Taiwan Semiconductor Manufacturing Company (TSMC) and Semiconductor Manufacturing International Corporation (SMIC), has also joined Silterra as the new chief operation officer (COO).

Backed by these well-known experts in the industry, as well as backup by its largest shareholder, the Malaysian government, Silterra is ready for expansion in a fundamental way. 

Digitimes recently had the opportunity to interview company CEO Eg Kah Yee when he shared his views over the transition of Silterra.

This is part one of a two-part interview.

Q: What is your comment about the EDA industry after spending years in it?

A: No one from the EDA industry is willing to create a new business as it is hard for them to "cash-out". We hardly see any EDA company make it to an initial public offering (IPO) stage since in the end they can only be sold to one of the three big players – Cadence Design Systems, Mentor Graphics and Synopsys. Any new EDA company has to be well prepared for being merged by one of these players. 

When the smaller scale EDA companies find their technologies are similar to the big players, they can only sell specific technologies and there will only be one way left for these companies. If the entire industry lacks a growth catalyst, then competition for orders eventually drag down average selling prices (ASPs) and sales and in turn, further erodes industry growth. 

Investors who expect a sales amount of US$1 billion this year, expect a minimum of US$1.1 billion next year. If you only guide US$1 billion in sales, your company's stock price slumps, meaning that a merger is more difficult. As costs for running the business is relatively higher, management will find their pressure grows.
When I left the EDA industry, the industry had already reached its climax in terms of technology. Although industry players strive to tap into IC designs, they encounter bottlenecks as they are offering design "OEM" without high margin. They are also exposed to competition from emerging regions such as China and India as engineers from these regions have lower costs. EDA players have also reduced their proportion of design services because they do not offer foundry capacity. 

Q: Performing as Silterra CEO for half a year, how are you going to lead Silterra in the future?

A: First, we have to admit that Silterra will not compete for process advancement as it is unnecessary. We have neither memory customers nor have any involvement in the memory, field programmable gate array (FPGA), CPU and graphics chips markets. If we move forward to 90nm, 65nm or 45nm, we have to make serious considerations as our fabs will just be left idle if we do not have customers in these areas.

What we can do is provide enhanced values for EDA and design tools instead of only performing "printing" tasks. If process pursuit is a horizontal movement, design is more like vertical. We will dedicate our resources and specialize on the enhancement of present processes that include high-voltage and RF CMOS in order to reduce any disturbance being posed on design.

Silterra also prepares SoC production for different segments such as AC-DC and RF, in order to deliver a more convenient design environment for customers. We integrate design and manufacturing. We optimize wafer production and integrate production with design.

Q: How does Silterra compete with larger-scale foundries?

A: I always stress that Silterra is relatively small in terms of business scale compared to foundries such as TSMC, IDMs or memory fabs and we can hardly pursue leading-edge processes. The market has a misunderstanding, believing that the pursuit of advanced technologies is necessary. We doubt this since technology advancement has to be made in accordance with the application and product.

utting-edge technology is required by only a few products, like CPUs, FPGA, graphics chips and memory, as they strictly follow Moore's Law – transistor density doubling every two years. 

For consumer electronics, such as MP3 players, which use system-on-chip (SoC), the size of an IC fabricated on a 0.18-micron process will be 10×10mm and the size will shrink further to 5-6×6mm on 0.13-micron. The size of the IC is "invisible" if the process node advances further to 90nm. When an IC size shrinks, how can the corresponding 200-300 pin count I/O be shrunk? In light of this, process migration does not carry any meaning at all.

Products requiring process migration from 0.13-micron will be those for wireless applications that encounter inadequate bandwidth and frequency and require lower power consumption by advancing production to 90nm. Many consumer electronic IC designers found 0.13-micron design is good enough and see no meaningful benefit from more advanced processes.

The life cycle for 0.18-micron is longer than expected and that for 0.13-micron will be even longer. It is because both of the design geometries have similar architecture to that of a transistor itself. But when the geometries advance to 90nm and 65nm, designers will find it harder to make their moves forward because they use different architectures. 

Q: You mentioned that it is unnecessary for Silterra to extend to sub-micron process production due to the nature of customers targeted, but Silterra still plans for a 12-inch wafer fab and 90/65nm expansion, is there any conflict?

A: Design houses do not need 90/65nm process without having customers from CPU, FPGA, graphics chips and memory segment. But we are making the step forward as more consolidation will be seen in the industry due to cost concerns. 

Only IDMs and large-scale IC design houses have chances to make consolidations while others may just wait to be merged. I believe that small IC design houses may totally vanish from the market after 3-5 years. 
Silterra aims to focus on providing a complete IP library for communication and consumer electronics, including DVD, MP3, VoIP, Wi-Fi, WiMAX and GSM basestations. If a small IC design house is only able to make one type of Wi-Fi solution, we are here to help it to make complete VoIP solutions within a short period of time and to protect it from being merged.

Q: What kind of services is Silterra going to offer? 

A: Silterra tended to play as a dedicated foundry which offers a customer-owned tooling (COT) flow before I joined. The previous business model is similar to Broadcom, that is, no IPs and design flows are required but instead, all "tools" (designs, services, IPs, models) are owned by customers.

A foundry is more like a factory, or "wafer-printing" fab, under this business model as it is only responsible for production. Customers only have to submit their graphic display streamer (GDS) to this foundry for "printing", regardless whether this foundry understands the GDS or not. Even if the designs have defects, the foundry would not realize or could not get those defects corrected, as the foundry does not understand what the designs are.

I believe a foundry should provide "formats" (IPs) and templates (design platforms). Let's say if customers look for designs for a MP3 and portable media player (PMP), they may require a total of 15 IPs for power management (PWM) IC, CPU and I/O related-parts. Even if we provide 14 IPs out of the total required, we still cannot produce the required solution as even one single IP may require over a year's time to develop. But things will be different if there is a complete design platform. Customers may only take three months to have their solutions produced.

This interview was translated from Chinese.


SilTerra Malaysia CEO

Eg Kah Yee

About Silterra Malaysia Sdn. Bhd.:

Market demand driven, SilTerra Malaysia Sdn Bhd is a semiconductor wafer foundry offering major foundry compatible CMOS logic, high-voltage and mixed-signal/RF technologies down to 0.13-micron feature size. This includes complete, competitive contract manufacturing for fabless and IDM customers’ designs. SilTerra’s wafer fab has a design capacity of 40,000 eight-inch wafers per month.
Environmentally vigilant, SilTerra delivers award winning, world-class performance to its customers seeking flexible capacity, competitive advantages and around the clock customer support. SilTerra is ISO 9001:2000 and ISO 14001 certified. Founded in 1995, the company’s headquarters and factory are located in Malaysia’s Kulim High-Tech Park, and SilTerra has sales and marketing offices in San Jose (California) and Hsinchu (Taiwan). For additional information on SilTerra or its services, please visit www.silterra.com.