strategy for success: Q&A with Steve Della Rocchetta, EVP,
28 December 2005)
Despite the attractions of the fabless-plus-foundry model, any
foundry hoping to compete in an industry dominated by the
likes of UMC and TSMC will need to think carefully about its
strategy. In the case of Silterra,whose production facility is
located in the Kulim High-Tech Park, Malaysia, the strategy
combines carefully timed moves to deep submicron with the
cultivation of mass-market customers. The result is financial
stability after troubled times in the semiconductor industry,
and strategic relationships that include a partnership with
Taiwan design-service house Goyatek. Silterra is also involved
in a joint development project with IMEC in Europe. According
to Steve Della Rocchetta, EVP, Sales and Marketing, Silterra
is going into 2006 with optimism.
DigiTimes.com spoke recently with Della Rocchetta about
Silterra's strategy, technology and prospects. This interview
also includes contributions from Koh Meng Kong (MK), director
of Marketing for Silterra in Asia.
This is Part I of a three-part interview. Part II will follow
on 29 December.
Q: Interesting news from Silterra in 2004 included the start
of a joint development project (JDP) with IMEC, in Europe, for
0.13-micron CMOS process. Towards the end of 2004, both a
4Mbit and an 8Mbit SRAM were announced. As I understand it,
this is a copper process, with supporting design libraries and
IP. What is the status, now, of this JDP with IMEC?
A: We began a joint development project at 0.13 micron with
IMEC. This is an all-copper process. We are supporting it with
foundation IP, such as design libraries, and star IP.
Foundation IP tends to be available early. We're actively
engaged with a star-IP licensing plan, and foundation IP from
companies such as Virage is available now. The higher value
star IP, including ARM processor cores, will become available
in the first and second quarters of 2006.
The process is in qualification, and we're producing 8Mbit
SRAMs on a regular basis as a qualification vehicle. The
defect density is approaching world-class standards. We are
quite pleased with our progress. So, overall, I would say the
project with IMEC has been a tremendous success. The process
is ready for prototyping. We're marketing it actively, and
we're in discussion with several customers who will tape-out
products sometime in the next three months.
Q: Are there plans for further cooperation?
A: IMEC now has a 300mm facility. They're doing very advanced
development work, and the opportunity is there for us to
cooperate with them, both at 90 nanometers and at future
process nodes beyond 90 nanometers.
Q: Do you have any sense of a timeframe for other processes at
deep submicron, going down from 90 nanometers to 65 or 45
A: We'll be taking this a step at a time. I think that 90
nanometers would be the next engagement point for us,and I
think it would be premature for me to comment on any future
65- or 45-nanometer processes at this time. I say that because
we try to intercept the volume sweet spot of the production
technology. Today, 0.18 micron has the highest volume of
silicon in production; certainly that has been the case in
2005. I don't think the crossover point will occur until 2006,
when the largest production volumes will be at 0.13 micron.
Our target customers generally do not require bleeding-edge
technologies. We try to take this a step at a time, and we try
to time things carefully. I'm not saying we won't go beyond 90
nanometers; it's just that there is no timeframe.
Q: Do you have any comment to make on the technical
difficulties involved in implementing copper interconnects?
A: If you were doing it four or five years ago, or very early
on, I think it was a substantial challenge. If you look at how
we are implementing it today, we are working with
second-generation copper equipment, and frankly a lot of the
technical challenges have already been resolved. One of the
things we try to offer is value for our customers, and one of
the ways to accomplish that is to keep the R&D expenses
low. IMEC is a renowned organization for advanced process
technologies, and we achieved yielding silicon on the very
first wafer lot.
Q: According to information given in press releases, Silterra
currently has a designed capacity for 40,000 8-inch wafers per
month. Does Silterra plan to expand this capacity? Does
Silterra have any plans for 300mm production?
A: The facility has 40,000 wafer-outs of capacity, but we are
tooled to 30,000. However, during 2006 we will expand it to
We have a proposed plan for a Fab 2, although construction
would probably not begin before 2008. By our estimate, it
would take about 11 months, from ground-breaking, to get the
facility operational. We have site availability at our current
location, so that's not an issue. There's also lots of
infrastructure, now, in the Kulim High-Tech Park. There are
currently two fabs – Silterra’s Fab 1 and a fab Infineon
is building on land adjacent to ours.
If and when we do build a second fab, it's likely to be a
300mm facility. We feel we could bring it up fairly quickly,
and it's likely it would be capable of 90- and 65-nanometer
Silterra Malaysia Sdn. Bhd.:
Market demand driven, SilTerra Malaysia Sdn Bhd is a
semiconductor wafer foundry offering major foundry compatible
CMOS logic, high-voltage and mixed-signal/RF technologies down
to 0.13-micron feature size. This includes complete,
competitive contract manufacturing for fabless and IDM
customers’ designs. SilTerra’s wafer fab has a design
capacity of 40,000 eight-inch wafers per month.
vigilant, SilTerra delivers award winning, world-class
performance to its customers seeking flexible capacity,
competitive advantages and around the clock customer support.
SilTerra is ISO 9001:2000 and ISO 14001 certified. Founded in
1995, the company’s headquarters and factory are located in
Malaysia’s Kulim High-Tech Park, and SilTerra has sales and
marketing offices in San Jose (California) and Hsinchu
(Taiwan). For additional information on SilTerra or its
services, please visit www.silterra.com.
Koh Meng Kong
+6-012-491-0425 (Cell phone)
Lu Ping Chiang
Tel : +886-3-574-1587 (o)