RFCMOS – CL130MR

SilTerra’s CL130MR (0.13um RFCMOS) is developed specifically for wireless applications in Zigbee, WLAN, Bluetooth, RF transceiver and tuners. Many RF circuits are already proven in our RFCMOS technology. This technology is supported with complete RF models and RF design kits that are silicon proven.

CL130MR Key Process Features

  • Industry standard 0.13µm CMOS logic technology
  • Single-poly and up to eight metal layers
  • Multiple voltages: 1.2V core, 2.5V/3.3V I/O
  • Regular Vt and High Vt device options offered
  • Cobalt silicided source, drain and gate
  • Shallow trench isolation
  • Super steep retrograde twin well
  • Dual damascene copper metalization
  • FSG inter-metal dielectric
  • Metal-Insulator-Metal (MIM) Capacitor ( 1.0, 1.5, 2.0 fF/µm2 )
  • Thick metal spiral inductor
  • Varactor Metal Finger Capacitor ( 1.30 fF/µm2 )
  • Thick Metal Spiral Inductor ( 3.2µm )
  • Ft NMOS ( 81 GHz )

Physical Design Rules

Parameter Unit 1.2V Pitch 2.5V Pitch 3.3V Pitch
Active μm 0.36 0.36 0.36
Poly μm 0.31 0.53 0.55 (PMOS)
0.60 (NMOS)
Contact μm 0.34 0.34 0.34
Metal 1 μm 0.34 0.34 0.34
Via 1 μm 0.41 0.41 0.41
Metal X μm 0.41 0.41 0.41
Via X μm 0.41 0.41 0.41
Via Top μm 0.71 0.71 0.71
Metal Top μm 0.82 0.82 0.82

Electrical Design Rules

Parameter Unit 1.2V RVt 1.2V HVt 2.5V 3.3V
Vtn_lin V 0.33 0.44 0.47 0.58
Vtp_lin V 0.35 0.46 0.50 0.61
ldsn μA/μm 535 417 630 610
ldsp μA/μm 235 170 300 300
loff nA/μm <1 <0.03 <0.03 <0.05

Foundation IP

IP Name Vendor Available
Std Cell SC9 RVt ARM/Synopsys Now
Std Cell SC9 HVt ARM Now
Std Cell SC9 LVt Custom Now
Std Cell SC7 RVt ARM Now
Memory Compilers ARM/Sysnopsys Now
GPIO Synopsys Now
OTP Ememory Now